The present disclosure relates to a digital circuit, and more particularly, to an ultra low voltage digital circuit and an operation method thereof.
In relation to a conventional digital circuit, a high-performance circuit design technique for maximizing the performance is mainly developed. However, as small digital devices such as mobile devices are used recently, a low-power circuit design technique for reducing power consumption is mainly developed.
In general, a high-performance circuit design technique has its object to maximize the operating speed or operating performance of a digital circuit without considering power consumption. On the other hands, a low-power circuit design technique has its object to minimize power consumption by lowering driving voltage or driving frequency such as Dynamic Voltage and Frequency Scaling (DVFS) or by using clock gating or power gating such as Dynamic Power Management (DPM). The low-power circuit design technique minimizes power consumption but has the disadvantage that operating performance is decreased and the high-performance circuit design technique maximizes operating performance but has the disadvantage that power consumption is increased. Recently, various techniques for simultaneously reducing power consumption and maintaining operating performance are developed.